(China (Mainland))
Product Summary
The PPC405GPR-3JB266 is a Power PC 405GPr Embedded Processor. Designed specifically to address embedded applications, the PPC405GPR-3JB266 provides a high-performance, low-power solution that interfaces to a wide range of peripherals by incorporating on-chip power management features and lower power dissipation requirements. This chip contains a high-performance RISC processor core, SDRAM controller, PCI bus interface, Ethernet interface, control for external ROM and peripherals, DMA with scatter-gather support, serial ports, IIC interface, and general purpose I/O.
Parametrics
PPC405GPR-3JB266 absolute maximum ratings: (1)Supply Voltage (Internal Logic), VDD: 0 to +1.95 V; (2)Supply Voltage (I/O Interface), OVDD: 0 to +3.6 V; (3)PLL Supply Voltage, AVDD: 0 to +1.95 V; (4)Input Voltage (1.8V CMOS receivers), VIN: -0.6 to VDD + 0.45 V; (5)Input Voltage (3.3V LVTTL receivers), VIN: -0.6 to OVDD + 0.6 V; (6)Input Voltage (5.0V LVTTL receivers), VIN: -0.6 to OVDD + 2.4 V; (7)Storage Temperature Range, TSTG: -55 to +150℃; (8)Case temperature under bias, TC: -40 to +120℃.
Features
PPC405GPR-3JB266 features: (1)PowerPC 405 32-bit RISC processor core operating up to 400MHz with 16KB I- and D-caches; (2)Synchronous DRAM (SDRAM) interface operating up to 133MHz, 32-bit interface for non-ECC applications; 40-bit interface serves 32 bits of data plus 8 check bits for ECC applications; (3)4KB on-chip memory (OCM); (4)External peripheral bus, Flash ROM/Boot ROM interface; Direct support for 8-, 16-, or 32-bit SRAM and external peripherals; Up to eight devices; External Mastering supported; (5)DMA support for external peripherals, internal UART and memory, Scatter-gather chaining supported; Four channels; (6)PCI Revision 2.2 compliant interface (32-bit, up to 66MHz); Synchronous or asynchronous PCI Bus interface; Internal or external PCI Bus Arbiter; (7)Ethernet 10/100Mbps (full-duplex) support with media independent interface (MII); (8)Programmable interrupt controller supports 13 external and 19 internal edge triggered or levelsensitive interrupts; (9)Programmable timers; (10)Two serial ports (16550 compatible UART); (11)One IIC interface; (12)General purpose I/O (GPIO) available; (13)Supports JTAG for board level testing; (14)Internal processor local Bus (PLB) runs at SDRAM interface frequency; (15)Supports PowerPC processor boot from PCI memory; (16)Unique software-accessible 64-bit chip ID number (ECID).
Diagrams
