(China (Mainland))
Product Summary
The MPC8270CZUUPE is an FPGA.
Parametrics
MPC8270CZUUPE absolute maximum ratings: (1)Core supply voltage, VDD: -0.3 to 2.25 V; (2)PLL supply voltage, VCCSYN: -0.3 to 2.25 V; (3)I/O supply voltage, VDDH: -0.3 to 4.0 V ; (4)Input voltage, VIN: GND(-0.3) to 3.6 V; (5)Junction temperature, Tj: 120℃; (6)Storage temperature range, TSTG: -55 to +150℃.
Features
MPC8270CZUUPE features: (1)Dual-issue integer (G2_LE) core, A core version of the EC603e microprocessor; System core microprocessor supporting frequencies of 166–450 MHz; Separate 16-Kbyte data and instruction caches: Four-way set associative; Physically addressed; LRU replacement algorithm; Architecture-compliant memory management unit (MMU); Common on-chip processor (COP) test interface; High-performance (SPEC95 benchmark at 450 MHz; 855 Dhrystones MIPS at 450 MHz); Supports bus snooping for data cache coherency; Floating-point unit (FPU); (2)Separate power supply for internal logic and for I/O; (3)Separate PLLs for G2_LE core and for the CPM, G2_LE core and CPM can run at different frequencies for power/performance optimization; Internal core/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 4.5:1, 5:1, 6:1, 7:1, 8:1 ratios; Internal CPM/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1, 8:1 ratios; (4)64-bit data and 32-bit address 60x bus, Bus supports multiple master designs; Supports single- and four-beat burst transfers; 64-, 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller; Supports data parity or ECC and address parity; (5)32-bit data and 18-bit address local bus, Single-master bus, supports external slaves; Eight-beat burst transfers; 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller.
Diagrams
| Image | Part No | Mfg | Description |  |
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 MPC8270CZUUPEA |
Freescale Semiconductor |
Microprocessors (MPU) PQ II HIP 7 REV A |
Data Sheet |
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