CY7C008V-25AXC

CY7C008V-25AXC, 64K × 8 Dual-Port Static RAM, LQFP, -0.5V to +4.6V, 20mA, Cypress Semiconductor

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Price:: US $26.40~29.50 / piece [Get Latest Price]

Reference price:

Qty (lots)	Price/lot
1 ~ 5 :	29.50 / Piece
5 ~ 10 :	27.60 / Piece
10 ~ 50 :	26.40 / Piece

PartNumber:: CY7C008V-25AXC

Brand:: Cypress Semiconductor - Cypress | Pack: LQFP | D/C: 08+

Availability:: Supply Ability: 2/Day Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

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Products Upload time: 2013-01-14

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Part Number:CY7C008V-25AXC
US $26.40 - 29.50
Quantity:

piece

Product Summary

The CY7C008V-25AXC is a low-power CMOS 64K × 8 dual-port static RAM. Various arbitration schemes are included on the devices to handle situations when multiple processors access the same piece of data. Two ports are provided permitting independent, asynchronous access for reads and writes to any location in memory. The CY7C008V-25AXC can be utilized as standalone 8-bit dual-port static RAMs or multiple devices can be combined in order to function as a 16 or wider master dual-port static RAM. An M pin is provided for implementing 16/18-bit or wider memory applications without the need for separate master and slave devices or additional discrete logic.

Parametrics

CY7C008V-25AXC absolute maximum ratings: (1)Storage Temperature: -65℃ to +150℃; (2)Ambient Temperature with Power Applied: -55℃ to +125℃; (3)Supply Voltage to Ground Potential: -0.5V to +4.6V; (4)DC Voltage Applied to Outputs in High Z State: -0.5V to VCC+0.5V; (5)DC Input Voltage: -0.5V to VCC+0.5V; (6)Output Current into Outputs (LOW): 20 mA; (7)Static Discharge Voltage: >1100V; (8)Latch-Up Current: >200 mA.

Features

CY7C008V-25AXC features: (1)True Dual-Ported memory cells which allow simultaneous access of the same memory location; (2)64K x 8 organization (CY7C008); (3)0.35-micron CMOS for optimum speed/power; (4)High-speed access: 15/20/25 ns; (5)Low operating power, Active: ICC = 115 mA (typical); Standby: ISB3 = 10 μA (typical); (6)Fully asynchronous operation; (7)Automatic power-down; (8)Expandable data bus to 16/18 bits or more using Master/Slave chip select when using more than one device; (9)On-chip arbitration logic; (10)Semaphores included to permit software handshaking between ports; (11)INT flag for port-to-port communication; (12)Dual Chip Enables; (13)Pin select for Master or Slave; (14)Commercial and Industrial Temperature Ranges; (15)Available in 100-pin TQFP; (16)Pb-Free packages available.