XCS30XL-4VQG100C

XCS30XL-4VQG100C, Field Programmable Gate Array, VQFP, -0.5 to +7.0 V, 6,mA, Xilinx, Inc

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Price:: US $17.50~18.05 / piece [Get Latest Price]

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Qty (lots)	Price/lot
1 ~ 500 :	18.05 / Piece
500 ~ 1000 :	17.85 / Piece
1000 ~ 2000 :	17.50 / Piece

PartNumber:: XCS30XL-4VQG100C

Brand:: Xilinx, Inc - Xilinx | Pack: VQFP | D/C: 11+

Availability:: Supply Ability: 2000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-12-27

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Part Number:XCS30XL-4VQG100C
US $17.50 - 18.05
XCS30XL-4VQG100C

US $1.00 - 1.00 / Piece
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Product Summary

The XCS30XL-4VQG100C is an Field Programmable Gate Array. The Spartan and the Spartan-XL families are a high-volume production FPGA solution that delivers all the key requirements for ASIC replacement up to 40,000 gates. These requirements include high performance, on-chip RAM, core solutions and prices that, in high volume, approach and in many cases are equivalent to mask programmed ASIC devices. The XCS30XL-4VQG100C is the result of more than 14 years of FPGA design experience and feedback from thousands of customers.

Parametrics

XCS30XL-4VQG100C absolute maximum ratings: (1)VCC, Supply voltage relative to GND: -0.5 to +7.0 V; (2)VIN, Input voltage relative to GND: -0.5 to VCC +0.5 V; (3)VTS, Voltage applied to 3-state output: -0.5 to VCC +0.5 V; (4)TSTG, Storage temperature (ambient): -65 to +150℃; (5)TJ, Junction temperature Plastic packages: +125℃.

Features

XCS30XL-4VQG100C features: (1)First ASIC replacement FPGA for high-volume production with on-chip RAM; (2)Density up to 1862 logic cells or 40,000 system gates; (3)Streamlined feature set based on XC4000 architecture; (4)System performance beyond 80 MHz; (5)Broad set of AllianceCORE and LogiCORE predefined solutions available; (6)Unlimited reprogrammability; (7)Low cost; (8)Available in both 5V and 3.3V versions; (9)On-chip SelectRAM. memory; (10)Fully PCI compliant; (11)Full readback capability for program verification and internal node observability; (12)Dedicated high-speed carry logic; (13)Internal 3-state bus capability; (14)Eight global low-skew clock or signal networks; (15)IEEE 1149.1-compatible Boundary Scan logic; (16)Low cost plastic packages available in all densities; (17)Footprint compatibility in common packages.